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MM74HC594 8-Bit Shift Register with Output Registers
January 1992 Revised May 1999
MM74HC594 8-Bit Shift Register with Output Registers
General Description
This high speed shift register utilizes advanced silicon-gate CMOS technology. This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clears are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output (standard) pins for cascading. Both the shift register and storage register use positive-edge triggered clocks. If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register. The 74HC logic family is speed, function, and pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
s Low quiescent current: 80 A maximum s Low input current: 1 A maximum s 8-bit serial-in, parallel-out shift register with storage s Wide operating voltage range: 2V to 6V s Cascadable s Shift register has direct clear s Guaranteed shift frequency: DC to30 MHz
Ordering Code:
Order Number MM74HC594M MM74HC594N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Truth Table
RCK X X X SCK X X SCLR RCLR X L H L X H Function Storage Register cleared Shift Register cleared Q'H = 0 Shift Register clocked QN = Qn-1, Q0 = SER Contents of Shift X H H Register transferred to output latches
(c) 1999 Fairchild Semiconductor Corporation
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MM74HC594
Logic Diagram
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MM74HC594
Absolute Maximum Ratings(Note 1)
(Note 2) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) (Soldering 10 seconds) 260C 600 mW 500 mW -0.5 to +7.0V -1.5 to VCC +1.5V -0.5 to VCC +0.5V 20 mA 35 mA 70 mA -65C to +150C
Recommended Operation Conditions
Min Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times (tr, tf) VCC = 2.0V VCC = 4.5V VCC = 6.0V 1000 500 400 ns ns ns -40 +85 C 2 0 Max 6 VCC Units V V
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating--plastic "N" package: -12 mW/C from 65C to 85C.
DC Electrical Characteristics
Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage
(Note 4)
VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V TA = 25C Typ 1.5 3.15 4.2 0.5 1.35 1.8 2.0 4.5 6.0 4.7 5.2 4.2 5.7 0 0 0 0.2 0.2 0.2 0.2 1.9 4.4 5.9 3.98 5.48 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.26 0.26 0.1 8.0 TA = -40 to 85C Guaranteed Limits 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 3.84 5.34 0.1 0.1 0.1 0.33 0.33 0.33 0.33 1.0 80 A A V V V V V V Units
Conditions
VIN = VIH or VIL |IOUT| 20 A 2.0V 4.5V 6.0V V
Q'H
VIN = VIH or VIL |IOUT| 4.0 mA |IOUT| 5.2 mA 4.5V 6.0V 4.5V 6.0V 2.0V 4.5V 6.0V
QA thru QH
VIN = VIH or VIL |IOUT| 6.0 mA |IOUT| 7.8 mA
VOL
Maximum LOW Level Output Voltage
VIN = VIH or VIL |IOUT| 20 A V
Q'H
VIN = VIH or VIL |IOUT| 4.0 mA |IOUT| 5.2 mA 4.5V 6.0V 4.5V 6.0V 6.0V 6.0V
QA thru QH
VIN = VIH or VIL |IOUT| 6.0 mA |IOUT| 7.8 mA
IIN ICC
Maximum Input Current Maximum Quiescent Supply Current
VIN = VCC or GND VIN = VCC or GND IOUT = 0 A
Note 4: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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MM74HC594
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol fMAX Parameter Maximum Operating Frequency tPHL, tPLH Maximum Propagation Delay from SCK to Q'H tPHL, tPLH Maximum Propagation Delay from RCK to QA thru QH CL = 50 pF CL = 150 pF CL = 50 pF CL = 150 pF CL = 50 pF CL = 150 pF tPHL, tPLH Maximum Propagation Delay from SCLR to Q'H tPHL Maximum Propagation Delay from RCLR to QA thru QH CL = 150 pF CL = 50 pF CL = 50 pF Conditions CL = 50 pF VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V tS SCLR LOW to RCK 2.0V 4.5V 6.0V tS RCLR HIGH to SCK 2.0V 4.5V 6.0V tS Minimum Setup Time from SER to SCK tR Minimum Removal Time from SCLR to SCK tS Minimum Setup Time from SCK to RCK tH Minimum Hold Time SER to SCK tW Minimum Pulse Width of SCK or SCLR or RCK or RCLR tr, tf Maximum Input Rise and Fall Time, Clock tTHL, tTLH Maximum Output Rise and Fall Time QA - QH tTHL, tTLH Maximum Output Rise and Fall Time Q'H 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V TA = 25C Typ 6 30 35 150 30 25 150 200 30 40 25 34 150 30 25 125 25 21 200 40 34 50 10 9 5 5 5 90 18 15 20 10 10 90 18 15 5 5 5 100 20 17 1000 500 400 60 12 10 75 15 13 -40C to +85C Guaranteed Limits 4.8 24 28 185 37 31 185 250 37 50 31 43 185 37 31 155 31 26 250 50 43 63 13 11 5 5 5 110 22 19 20 10 10 110 22 19 5 5 5 125 25 21 1000 500 400 75 15 13 95 19 16 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz Units
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MM74HC594
AC Electrical Characteristics
Symbol CPD Parameter
(Continued)
TA = 25C Typ 90 150 5 15 10 20 10 20 pF pF pF -40C to +85C Guaranteed Limits
Conditions
VCC
Units
Power Dissipation Capacitance, G = VCC Outputs Enabled (Note 5) G = GND Maximum Input Capacitance Maximum Output Capacitance
CIN COUT
Note 5: CPD determines the no load dynamic power consumption, and the no load dynamic current consumption.
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MM74HC594
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
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MM74HC594 8-Bit Shift Register with Output Registers
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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